1. Field of the Invention
The present invention relates to a memory incorporated in a microcomputer, and more particularly to an address circuit associated with a read only memory.
2. Description of related art
Heretofore, a microcomputer such as a one-chip microcomputer comprises a read only memory (ROM) storing a microprogram for controlling an operation of the microcomputer. As shown in FIG. 1, a ROM 10 is associated with an address circuit which is composed of an X-decoder 12 and a Y-decoder 14. These decoders 12 and 14 are adapted to receive respective allocated portions of a given address signal through buses 16 and 18, respectively. The X-decoder 12 and the Y-decoder 14 cooperate to allow a data or microinstruction designated by the given address signal to be read out through an output 20.
Further, if the capacity or size of the ROM is determined, the sum of the input numbers of the X-decoder 12 and the Y-decoder 14 is directly decided. Namely, if the number of inputs of the X-decoder is settled, the input number of the Y-decoder is accordingly determined. In addition, the numbers of the respective outputs of the X- and Y-decoders are also decided. These output numbers of the decoders and the output bit number of the ROM will determine the size of the ROM 10 in the X direction and in the Y direction.
However, the conventional address circuits of the ROM have been adapted to distribute all bits of an input address signal to the X-decoder and the Y-decoder, so that the input address signal is full-decoded without exception. Therefore, even if the ROM includes addresses which are never accessed, the X-decoder and the Y-decoder had to comprise all circuits required for full-decoding the input address. This will result in a wasteful increase of a LSI chip size.